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National Advanced Packaging Manufacturing Program

CHIPS for America National Advanced Packaging Manufacturing Program web banner showing production wafers
Credit: CHIPS for America

NOTICE OF FUNDING OPPORTUNITY (NOFO)

On October 18, 2024, the U.S. Department of Commerce issued a Notice of Funding Opportunity (NOFO) to enable the United States semiconductor industry to adopt innovative new advanced packaging flows for semiconductor technologies. CHIPS for America anticipates making available up to approximately $1.6 billion for funding multiple awards across five research and development (R&D) areas with the potential for follow-on funding for prototyping activities.

The five R&D areas are:

  1. Equipment, Tools, Processes, and Process Integration
  2. Power Delivery and Thermal Management
  3. Connector Technology, Including Photonics and Radio Frequency (RF)
  4. Chiplets Ecosystem
  5. Co-design/Electronic Design Automation (EDA)

Mandatory concept papers are due December 20, 2024. Concept papers received after this deadline will not be reviewed or considered.

On October 22, 2024, the CHIPS Research and Development Office will host a one-day meeting for potential applicants to this funding opportunity, followed by on-demand webinars explaining each research and development area. You can register for Proposer’s Day here.

Following Proposer’s Day, the webinars will be found here

The full text of the NOFO can be found here.

Packaging CHIPS for America
Credit: A. Kim/NIST

“Advanced packaging” refers to many chips with diverse functions assembled tightly together on a substrate in two or three dimensions at extremely fine dimensions. This method achieves function, performance, and power savings far greater than can be achieved with conventionally packaged chips on a printed circuit board. Recent advances in artificial intelligence, for example, would not be possible without advanced packaging.

Advanced packaging can be a transformative capability that helps U.S. manufacturers compete globally, but there are many technological challenges to solve. The CHIPS Research and Development Office has established the CHIPS National Advanced Packaging Manufacturing Program to address these challenges, including:

  • How do we design and assemble chips so tightly that they behave like a single traditional large chip, but with the production efficiency and cost savings of advanced packaging?
  • How do we supply power to and dissipate heat from such tightly coupled assemblies?
  • How do we test and repair such complex assemblies?
  • How do we ensure their reliability since traditional methods of visual inspection cannot be performed on such small, tightly packaged dimensions?

Investments in semiconductors will not succeed without investments in advanced packaging. The CHIPS and Science Act offers a once-in-a-generation opportunity to establish a domestic competitive advanced packaging capability in semiconductor manufacturing. 

In addition, the CHIPS NAPMP will help train semiconductor personnel and students in relevant technologies and feed these developments into domestic manufacturing facilities. The CHIPS NAPMP will work closely with the CHIPS National Semiconductor Technology Center, the semiconductor-related CHIPS Manufacturing USA Program, the CHIPS Metrology Program, and U.S. industry and academia to make this vision a reality.

The CHIPS NAPMP will enable the development of a robust domestic advanced packaging ecosystem by:

  • Establishing an advanced packaging piloting facility (or facilities) that accelerates the transfer of innovations in packaging, equipment, and process development into manufacturing;
  • Driving the development of digital tools to reduce the time and cost of advanced packaging engineering; and,
  • Establishing and supporting partnerships among industry, academia and training entities, and government to contribute to an advanced packaging workforce.

The six priority research investment areas of the CHIPS NAPMP are:

  1. Materials and substrates
  2. Equipment, tools, and processes
  3. Power delivery and thermal management for advanced packaging assemblies
  4. Photonics and connectors that communicate with the outside world
  5. A chiplet ecosystem
  6. Co-design of multi-chiplet systems with automated tools

Learn more from the CHIPS NAPMP vision paper, and sign up for updates from CHIPS to be informed of upcoming CHIPS NAPMP programs, events, and funding opportunities.