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I-Hsi Daniel Lu (Fed)

Semiconductor Metrology & Characterization Office – HQ

daniel.lu2 [at] chips.gov

Staff Employment

Program Manager, National Institute of Standards and Technology (NIST), CHIPS Metrology R&D Program, 2024 – Present

Semiconductor Industry Technical Consultant, Energetics, 2023 – 2024

Mechanical Project Engineer, Propersys Inc., 2022 – 2022

NIL Process Engineer – AR/VR Research, Applied Materials, 2021 – 2022

Equipment Engineer, JSR Micro, 2019 – 2021

Senior Research Technician – EUV Lithography, Lawrence Berkeley National Laboratory, 2019

Research Technician II – Multi-Discipline (HVPE Semiconductor Devices), National Renewable Energy Laboratory, 2017 – 2019

Staff Education

University of California, Riverside- Master of Science in Materials Science & Engineering

University of California, Riverside- Bachelor of Science in Chemistry

Areas of Expertise

Nanofabrication / manufacturing

I-Hsi Daniel Lu is a Program Manager at the National Institute of Standards and Technology (NIST), leading the CHIPS Metrology R&D program under Grand Challenge 7: Hardware Security. In this role, he is responsible for strategic planning, stakeholder engagement, and program execution to drive advancements in semiconductor metrology and hardware security.

Before joining NIST, Lu was the principal author of the DOE AMMTO’s Energy Efficiency in Semiconductor Industry (EES2) Roadmap, guiding technical experts, industry leaders, and academia in shaping semiconductor energy efficiency strategies. His expertise spans nanoimprinting lithography, photolithography, metrology, and deposition, and has extensive experience in technology roadmaps, public-private partnerships, and semiconductor research initiatives.

Lu has held technical and leadership roles in the semiconductor industry, including at Energetics, Applied Materials, JSR Micro, Lawrence Berkeley National Laboratory, and the National Renewable Energy Laboratory.

With a strong background in semiconductor process development and research, Lu is dedicated to advancing U.S. semiconductor metrology capabilities and fostering collaborations between industry, academia, and government.