A Capacitance-Voltage Model for Polysilicon-Gated MOS Devices Including Substrate Quantization Effects Based on Modification of the Total Semiconductor Charge

Published

March 10, 2003

Author(s)

Eric M. Vogel, Curt A. Richter, Brian G. Rennex

Abstract

We present a model for simulating the capacitance-voltage characteristics of polysilicon-gated MOS devices with thin oxides. The model includes substrate quantization effects through a modification of the total semiconductor charge. Therefore, solutions for capacitance-voltage can be quickly obtained without the computational burden of solving over a physical grid. The model includes polysilicon depletion by self-consistently solving the Poisson equation. We conclude with comparisons of the capacitance-voltage characteristics obtained with this model and those obtained by self-consistent solutions to the Schroedinger and Poisson equations. Good agreement was observed over a wide range of oxide thickness and substrate doping.

Citation

Solid-State Electronics

Volume

47

Pub Type

Journals

Keywords

MOS structure, quantum mechanical effects, MOS model, capacitance-voltage, poly-depletion, thin oxides

Citation

Vogel, E. , Richter, C. and Rennex, B. (2003), A Capacitance-Voltage Model for Polysilicon-Gated MOS Devices Including Substrate Quantization Effects Based on Modification of the Total Semiconductor Charge, Solid-State Electronics (Accessed July 18, 2024)