Ultra-Low Phase Noise Frequency Division with Array of Direct Digital Synthesizers

Published

December 25, 2023

Author(s)

Marco Pomponio, Archita Hati, Craig Nelson

Abstract

In this article, we present a four-channel direct digital synthesis (DDS) design that operates with a common clock ranging from 500 MHz to 24 GHz and generates output frequencies up to 1.75 GHz. A key feature of this board is its custom field-programmable gate array (FPGA)-based synchronization method, which ensures alignment accuracy of 170 ps between the channels, enabling precise frequency and phase relationship settings. In addition, the DDS board incorporates a user-friendly web interface that allows for continuous control and monitoring capabilities over TCP/IP. Multiple synchronized channels can be power-combined to produce a low-phase noise output due to coherent addition of the common carriers and the noncoherent addition of the residual DDS noise. By exploiting these principles and combining eight parallel channels of two DDS boards, we achieve exceptional residual phase noise performance, with L(1 Hz) = −147 dBc/Hz and L(100 kHz) = −180 dBc/Hz for a 9.765625 MHz output signal. These noise levels surpass the previously reported results achieved with regenerative frequency dividers. We also present a method for obtaining accurate residual noise measurements using an absolute phase modulation (PM) noise and amplitude modulation (AM) noise analyzer. Furthermore, we analyze the phase alignment tolerances required to minimize the AM-to-PM and PM-to-AM conversion that commonly occurs in power-combined signals. Finally, we demonstrate the synthesis of a highly stable 9.765625 MHz signal obtained from a cavity-stabilized optical frequency comb (OFC), with an absolute white phase noise of −180 dBc/Hz.

Citation

IEEE Transactions on Instrumentation and Measurement

Pub Type

Journals

Download Paper

https://doi.org/10.1109/TIM.2023.3346538

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Keywords

Amplitude modulation (AM) noise, direct digital synthesis (DSS), field-programmable gate array (FPGA), frequency division, phase modulation (PM) noise, time-to-digital converter (TDC).

Citation

Pomponio, M. , Hati, A. and Nelson, C. (2023), Ultra-Low Phase Noise Frequency Division with Array of Direct Digital Synthesizers, IEEE Transactions on Instrumentation and Measurement, [online], https://doi.org/10.1109/TIM.2023.3346538, https://tsapps.nist.gov/publication/get_pdf.cfm?pub_id=936763 (Accessed December 3, 2024)