Biden-Harris Administration Announces First CHIPS for America R&D Facilities and Selection Processes

Today, the Department of Commerce and Natcast, the operator of the National Semiconductor Technology Center (NSTC), announced the processes for selecting the first three research and development (R&D) facilities funded through the CHIPS and Science Act. The facilities include a NSTC Prototyping and National Advanced Packaging Manufacturing Program (NAPMP) Advanced Packaging Piloting Facility, a NSTC Administrative and Design Facility, and a NSTC Extreme Ultraviolet (EUV) Center. The Department and Natcast expect to announce information at a later date about the process for selecting affiliated technical centers.

As part of President Biden’s Investing in America agenda, CHIPS for America investments are targeted to help build vibrant semiconductor ecosystems in the U.S. that bolster cutting-edge R&D and create quality jobs. Bridging the gap between research and industry is a key component to realizing this agenda and ensuring that CHIPS for America will be an enduring success. The CHIPS R&D facilities will facilitate this by convening partners across the semiconductor ecosystem to ensure technological advances in semiconductor design and manufacturing can transfer at scale to commercialization. This approach showcases the U.S.’ commitment to secure and lead in domestic semiconductor manufacturing, packaging, and research for decades to come.  

“To reclaim America’s semiconductor leadership, we can’t just invest in manufacturing capacity, we also need to supercharge our research and development ecosystem. The National Semiconductor Technology Center and National Advanced Packaging Manufacturing Program are critical components in making that happen, and with the facilities CHIPS for America will be funding we will drive innovation and help recruit and train the next generation of American semiconductor workers,” said Secretary of Commerce Gina Raimondo.

“The CHIPS R&D facilities launch is an exciting milestone in the implementation of President Biden’s CHIPS & Science Act. This will help build the R&D infrastructure America needs to lead on advanced manufacturing for decades to come. President Biden is determined that semiconductor manufacturing will thrive in America after it was neglected for far too long,” said Lael Brainard, National Economic Advisor.

“Standing up domestic assets for research and development in both semiconductor and advanced packaging is a unique opportunity for the United States given how the lines are blurring between these areas,” said Under Secretary of Commerce for Standards and Technology and National Institute of Standards and Technology Director Laurie E. Locascio. “Ensuring development in both areas is well synchronized will be key for future advancements in AI and other technologies. These facilities will lower barriers to participation in semiconductor research and innovation and will provide state-of-the-art tools and processes at a scale that allows for more rapid transition to manufacturing.”

“This announcement represents a major step forward in the evolution of the NSTC and will provide key capabilities for researchers in the United States to accelerate the rate and pace of domestic R&D. These facilities will convene the semiconductor ecosystem to enable a vibrant and sustainable innovation pipeline,” said Deirdre Hanford, CEO of Natcast, the operator of the NSTC.

When fully operational, these three state-of-the art facilities will establish world-class destinations for advanced semiconductor R&D in the United States. These facilities will address critical gaps in the current ecosystem, offering unparalleled value to a diverse array of stakeholders across the semiconductor value chain, including universities, small businesses, large manufacturers, and government agencies. The Department and Natcast intend for the NSTC Administrative and Design Facility to be operational in 2025, the NSTC EUV Center by 2026, and the NSTC Prototyping and NAPMP Advanced Packaging Piloting Facility in 2028.

Together, these facilities will allow innovators to collaborate and solve the most challenging problems in microelectronics. Specifically, these first three facilities will:   

• Accelerate innovation by enabling world class R&D across the full range of microelectronics technical areas—including access to EUV lithography, which is needed for research using the most advanced patterning technology; 
• Create differentiation to ensure there is a clear value to the semiconductor ecosystem beyond existing comparable facilities; 
• Be financially sustainable by creating enduring value for decades and attracting investment from all types and sizes of companies; 
• Be independent and neutral by enabling Natcast, on behalf of the NSTC, and the NAPMP to make strategic decisions about the operation of the facilities, and by ensuring that the facilities are places where all member entities and their employees have the opportunity to successfully innovate;
• Exist in thriving and vibrant ecosystems that can provide, foster, and grow a talented workforce and a robust ecosystem of semiconductor companies, educational and research institutions, and local support to advance the mission.

The CHIPS R&D facilities model is informed by these principles, over a year of discussions with stakeholders building on the release of the NSTC Vision and Strategy Paper and the NAPMP Vision Paper, and robust analysis on the current and planned future state of the U.S. semiconductor manufacturing and R&D ecosystems. A request for information published by Natcast in March 2024, collected feedback on the demand for prototyping facilities capabilities and also informed the facility model as follows.

The NSTC Prototyping and NAPMP Advanced Packaging Piloting Facility will combine state-of-the-art manufacturing and packaging and next-generation technology development to provide NSTC members and NAPMP funded researchers with 300mm research, prototyping, and packaging capabilities. Co-locating the NSTC research and development prototyping and NAPMP packaging capabilities in a single facility will provide the domestic semiconductor ecosystem with unique value to conduct collaborative semiconductor and advanced packaging research.  

The NSTC Administrative and Design Facility will be a multi-functional facility, serving as the location for key operations of the NSTC, including: hosting Natcast administrative functions, convening consortium members and conducting NSTC programmatic activity such as the Workforce Center of Excellence, NSTC Design Enablement Gateway, and advanced semiconductor research in chip design, electronic design automation, chip and system architecture, and hardware security. 

The NSTC EUV Center will provide NSTC members with access to EUV technology to facilitate a wider range of research and a path to commercialization, including technologies with the most challenging feature sizes. Next-generation technology development requires access to EUV lithography. In addition to access to EUV technology, this center will also provide appropriate space for Natcast researchers and staff as well as member assignees to conduct research and collaborate in the facility.  

The Department and Natcast will select facilities deemed the most advantageous to the objectives of CHIPS for America, including based on an assessment of all the factors considered in each selection process. To learn more about the three facilities, please view this informational webinar and visit Natcast’s website.
  
The week of July 15, 2024, the Department and Natcast will issue an “Ecosystem Questionnaire for States and Territories to Inform CHIPS R&D Facility Site Selection Process” (Ecosystem Questionnaire) to the Economic Development Organizations (EDOs) of all 56 states, territories, and the District of Columbia to identify thriving and vibrant semiconductor ecosystems that could potentially support the NSTC Prototyping and NAPMP Advanced Packaging Piloting Facility. EDOs will receive notice as soon as the Ecosystem Questionnaire is live and will have one week to complete it in order to be considered for the NSTC Prototyping and NAPMP Advanced Packaging Piloting Facility.

More information on the selection process for the NSTC Prototyping and NAPMP Advanced Packaging Piloting Facility, as well as the NSTC Administrative and Design Facility and NSTC EUV Center, can be found here. If you have questions regarding these opportunities, please email FacilitiesRFI [at] natcast.org (FacilitiesRFI[at]natcast[dot]org).    

To learn more about the CHIPS NSTC Programs, visit CHIPS.gov and read the NSTC Roadmap.

About CHIPS for America    
CHIPS for America is part of President Biden’s economic plan to invest in America, stimulate private sector investment, create good-paying jobs, make more in the United States, and revitalize communities left behind. CHIPS for America includes the CHIPS Program Office, responsible for manufacturing incentives, and the CHIPS Research and Development (R&D) Office, responsible for R&D programs. Both offices sit within the National Institute of Standards and Technology (NIST) at the Department of Commerce. NIST promotes U.S. innovation and industrial competitiveness by advancing measurement science, standards, and technology in ways that enhance economic security and improve our quality of life. NIST is uniquely positioned to successfully administer the CHIPS for America program because of the bureau’s strong relationships with U.S. industries, its deep understanding of the semiconductor ecosystem, and its reputation as fair and trusted. Visit https://www.chips.gov to learn more.