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Challenges in Metrology for the Semiconductor Industry

Published

Author(s)

Stephen Knight, Joaquin (. Martinez

Abstract

Leading edge Ultra Large Scale Integrated Circuit manufacture is now well into the realm of Nanoelectronics, with some critical dimensions below 40 nm. The pressures on metrology supporting this manufacture are escalating rapidly. In this presentation we will discuss present and future metrology needs and potential solutions.
Citation
Journal of Vacuum Science and Technology B

Keywords

circuit, cirtical dimension, metrology, nanoelectronics, semiconductor

Citation

Knight, S. and Martinez, J. (2005), Challenges in Metrology for the Semiconductor Industry, Journal of Vacuum Science and Technology B, [online], https://tsapps.nist.gov/publication/get_pdf.cfm?pub_id=31889 (Accessed October 31, 2024)

Issues

If you have any questions about this publication or are having problems accessing it, please contact reflib@nist.gov.

Created March 20, 2005, Updated October 12, 2021