Edge Determination for Polycrystalline Silicon Lines on Gate Oxide

Published

August 1, 2001

Author(s)

John S. Villarrubia, Andras Vladar, J R. Lowney, Michael T. Postek

Abstract

In a scanning electron microscope (SEM) top-down secondary electron image, areas within a few tens of nanometers of the line edges arc characteristically brighter than the rest of the image. In general, the shape of the secondary electron signal within such edge regions depends upon the energy and spatial distribution of the electron beam and the sample composition, and it is sensitive to small variations in sample geometry. Assigning edge shape and position is done by finding a model sample that is calculated, on the basis of a mathematical model of the instrument-sample interaction, to produce an image equal to the one actually observed. Edge locations, and consequently line widths, are then assigned based upon this model sample. In previous years we have applied this strategy to lines with geometry constrained by preferential etching of single crystal silicon. With this study we test the procedure on polycrystalline silicon lines. Polycrystalline silicon lines fabricated according to usual industrial processes represent a commercially interesting albeit technically more challenging application of this method. With the sample geometry less constrained a priori, a larger set of possible sample geometries must be modeled and tested for a match to the observed line scan, and the possibility of encountering multiple acceptable matches is increased. For this study we have implemented a data analysis procedure that matches measured image line scans to a precomputed library of sample shapes and their corresponding line scans. Linewidth test patterns containing both isolated and dense lines separated from the underlying silicon substrate by a thin gate oxide have been fabricated. Line scans from test pattern images have been fitted to the library of modeled shapes.

Proceedings Title

Proceedings of SPIE, Metrology, Inspection, and Process Control for Microlithography XV, Neal T. Sullivan, Editor

Volume

4344

Conference Dates

February 26, 2001

Conference Location

Santa Clara, CA

Conference Title

Standards

Pub Type

Conferences

Keywords

critical dimension (CD), independent edges approximation, library-based metrology, line shape, linewidth metrology, scanning electron microscopy (SEM)

Citation

Villarrubia, J. , Vladar, A. , Lowney, J. and Postek, M. (2001), Edge Determination for Polycrystalline Silicon Lines on Gate Oxide, Proceedings of SPIE, Metrology, Inspection, and Process Control for Microlithography XV, Neal T. Sullivan, Editor, Santa Clara, CA (Accessed October 31, 2024)