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Displaying 126 - 150 of 718

Glassy Phases in Organic Semiconductors

March 17, 2018
Author(s)
Chad R. Snyder, Dean M. DeLongchamp
Organic semiconductors may be processed from fluids using graphical arts printing and patterning techniques to create complex circuitry. Because organic semiconductors are weak van der Waals solids, the creation of glassy phases during processing is quite

Paper in electronic and optoelectronic devices

March 6, 2018
Author(s)
Dongheon Ha, Zhiqiang Fang, Nikolai B. Zhitenev
The demand for lightweight, cost-effective, and/or flexible electronic and optoelectronic devices drives research toward new materials advancing the desired functionality or reducing manufacturing costs. Paper, being in addition an earth abundant and

Synchrotron Methods for Flexible Hybrid Electronics Industrial Recommendations on Interagency (DoC-DoD-DoE) Partnerships to Address Measurement Challenges Hindering the Flexible Hybrid Electronics Manufacturing Ecosystem

February 12, 2018
Author(s)
Christopher L. Soles, Richard A. Vaia, Ronald Pindak
The round-table participants concluded that facilities at NSLS-II provide immediate opportunities to address some of the critical processing and measurement challenges that are blocking the path towards a sustainable US-centric Flexible Hybrid Electronic

p-type doping efficiency in CdTe: Influence of second phase formation

January 29, 2018
Author(s)
Jedidiah J. McCoy, Santosh K. Swain, David R. Diercks, Brian Gorman, Kelvin G. Lynn, John R. Sieber
Cadmium Telluride (CdTe) high purity, bulk crystals doped with phosphorus have been grown via vertical Bridgman melt growth technique to understand and improve dopant solubility and activation. Large net carrier densities have been reproducibly obtained

STM patterned nanowire measurements using photolithographically defined implants in Si(100)

January 29, 2018
Author(s)
Aruna N. Ramanayaka, Hyun Soo Kim, Ke Tang, Xiqiao Wang, Richard M. Silver, Michael D. Stewart, Joshua M. Pomeroy
Using photolithographically defined implant wires for electrical connections, we demonstrate measurement of a scanning tunneling microscope (STM) patterned nanoscale electronic device on Si(100), eliminating the onerous alignment procedures and electron

Weak localization thickness measurements of embedded phosphorus delta layers in silicon produced by PH3 dosing

January 23, 2018
Author(s)
Joseph A. Hagmann, Xiqiao Wang, Pradeep N. Namboodiri, Jonathan E. Wyrick, Roy E. Murray, Michael D. Stewart, Richard M. Silver
The key building blocks for devices based on the deterministic placement of dopants in silicon are the formation of phosphorus dopant monolayers and the overgrowth of high quality crystalline Si. Lithographically defined dopant delta-layers can be formed

Analysis and Control of RRAM Overshoot Current

January 15, 2018
Author(s)
Pragya R. Shrestha, David M. Nminibapiel, Jason P. Campbell, Jason T. Ryan, Dmitry Veksler, Helmut Baumgart, Kin P. Cheung
To combat the large variability problem in RRAM,current compliance elements are commonly used to limit the inrush current during the forming operation. Regardless of the compliance implementation (1R-1R or 1T-1R), some degree of current overshoot is

Ferroelectricity in Polar Polymer-based FETs: A Hysteresis Analysis

January 15, 2018
Author(s)
Vasileia Georgiou, Dmitry Veksler, Jason Campbell, Jason Ryan, Pragya Shrestha, D. E. Ioannou, Kin P. Cheung
There is an increasing number of reports on polar polymer-based Ferroelectric Field Effect Transistors (FeFETs), where the hysteresis of the drain current - gate voltage (Id-Vg) curve is investigated as the result of the ferroelectric polarization effect

Plasma nanotexturing of silicon surfaces for photovoltaics applications: Influence of initial surface finish on the evolution of topographical and optical properties

November 27, 2017
Author(s)
Guillaume Fischer, Etienne Drahi, Martin Foldyna, Thomas Germer, Erik V. Johnson
Using a plasma to generate a surface texture with feature sizes on the order of nanometers ("nanotexturing") is a promising technique being considered for application in thin, high- efficiency crystalline silicon solar cells. This study investigates the

Towards reliable RRAM performance: macro- and microscopic analysis of operation processes

November 9, 2017
Author(s)
Gennadi Bersuker, Dmitry Veksler, David M. Nminibapiel, Pragya Shrestha, Jason Campbell, Jason Ryan, Helmut Baumgart, Maribeth Mason, Kin P. Cheung
Resistive RAM technology promises superior performance and scalability while employing well- developed fabrication processes. Conductance is strongly affected by structural changes in oxide insulators that make cell switching properties extremely sensitive

Microwave Evaluation of Electromigration Susceptibility in Advanced Interconnects

November 1, 2017
Author(s)
Yaw S. Obeng, Kin P. Cheung, Dmitry Veksler, Christopher E. Sunday
Traditional metrology has been unable to adequately address the needs of emerging integrated circuits (ICs) at the nano scale; thus, new metrology and techniques are needed. For example, the reliability challenges in fabrication need to be well understood

Local field effect on charge-capture/emission dynamics

October 30, 2017
Author(s)
Kin P. Cheung, Dmitry Veksler, Jason P. Campbell
Charge-capture/emission is ubiquitous in solid state devices. Its dynamics often play critical roles in device operation and reliability. Treatment of this basic process is found in many text books and is considered well understood. As in many solid state

3D Nanometrology Based on SEM Stereophotogrammetry

September 18, 2017
Author(s)
Vipin N. Tondare, John S. Villarrubia, Andras Vladar
Three-dimensional (3D) reconstruction of a sample surface from scanning electron microscope (SEM) images taken at two perspectives has been known for decades. However, this method has not been widely used in the semiconductor industry for 3D measurements
Displaying 126 - 150 of 718