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Search Publications by: Michael Gaitan (Assoc)

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Displaying 101 - 125 of 164

MEMS Standardization

December 31, 2000
Author(s)
Michael Gaitan
Standardization and metrology are critical infrastructure needs for the MEMS industry. These needs incluse standard test structures and test methods, and standard reference materials. In addition to this, new protocols to disseminate standards and test

Control of Flow Direction in Microfluidic Devices with Polyelectrolyte Multilayers

December 1, 2000
Author(s)
S L. Barker, David J. Ross, Michael J. Tarlov, Michael Gaitan, Laurie E. Locascio
Electroosmotic flow (EOF) is commonly utilized in microfluidics. Because the direction of the EOF can be determined by the substrate surface charge, control of the surface chemical state offers the potential, in addition to voltage control, to direct the

Quasi-TEM Characteristic Impedance of Micromachined CMOS Coplanar Waveguides

May 5, 2000
Author(s)
Mehmet Ozgur, V. Milanovic, C. A. Zincke, Michael Gaitan, Mona E. Zaghloul
Micromachined coplanar waveguides fabricated in CMOS technology consist of glass-encapsulated finite-thickness metal conductor strips, fully suspended by selective etching of the silicon substrate. Determination of the quasi-TEM mode characteristic

Derivatization of Plastic Microfluidic Devices With Polyelectrolyte Multilayers

May 1, 2000
Author(s)
S L. Barker, Michael J. Tarlov, M L. Branham, J Xu, William A. MacCrehan, Michael Gaitan, Laurie E. Locascio
Microchannels fabricated in plastic materials by room temperature imprinting demonstrate large variability in surface charge as a result of the fabrication procedure. Surface charged groups are primarily localized on the channel walls and not on the

IC Test Structures for Multi-Layer Interconnect Stress Determination

January 1, 2000
Author(s)
S. A. Smee, Michael Gaitan, Donald B. Novotny, Yogendra K. Joshi, David L. Blackburn
A new method for measuring strain in multi-layer IC interconnects is presented. This method utilizes process compatible micromachined test structures and is applied to the determination of longitudinal interconnect stress in a standard dual-metal-layer

High Q Backside Micromachined CMOS Inductors

August 1, 1999
Author(s)
Mehmet Ozgur, Mona E. Zaghloul, Michael Gaitan
Spiral inductors that are fabricated through a CMOS process, are micromachined by using a new post-processing procedure. In this new technique, the inductors are supported mechanically prior to etching with a low-loss host superstrate, and the silicon

Optimization of CMOS MEMS Microwave Power Sensors

August 1, 1999
Author(s)
V. Milanovic, M. Hopcroft, C. A. Zincke, Michael Gaitan, Mona E. Zaghloul
Micromachined power sensors with operation up to 50 GHz were recently achieved in CMOS technology. to improve their sensitivity and signal-to-noise ratio, while maintaining microwave performance, several design parameters must be considered, such as the

MEMS-Based Test Structures for IC Technology

December 31, 1998
Author(s)
S. A. Smee, Michael Gaitan, Yogendra K. Joshi, David L. Blackburn
As Integrated Circuit (IC) device sizes shrink, intrinsic and thermo-mechanical stress in interconnects is an ever increasing reliability concern. Increasing device density leads to more interconnect layers and hence, greater probability of stress related

Convective Accelerometer and Tilt Sensor in CMOS Technology

November 12, 1998
Author(s)
V. Milanovic, E. D. Bowen, N. H. Tea, Michael Gaitan, Mona E. Zaghloul
This paper describes a CMOS implementation of novel ID and 2D accelerometers that operate based on heat convection, requiring no solid proof mass. The devices consist of micromachined microheaters and thermocouple sensors separated by a gap and placed in

Characterization of Broad-Band Transmission for Coplanar Waveguides on CMOS Silicon Substrates

May 1, 1998
Author(s)
V. Milanovic, Mehmet Ozgur, Donald C. DeGroot, Jeffrey Jargon, Michael Gaitan, Mona E. Zaghloul
This paper presents characteristics of microwave transmission in coplanar waveguides (CPW's) on silicon (Si) substrates fabricated through commercial CMOS foundries. Due to the CMOS fabrication, the metal strips of the CPW are encapsulated in thin films of