Simple and Inexpensive FPGA-based Fast Multichannel Acquisition Board (Legacy/Original Version)

NOTE: THIS PAGE REFERS TO THE ORIGINAL VERSION OF THIS PROJECT. THE NEWEST VERSION, DATED JANUARY 2015, CAN BE FOUND HERE.

This first (and slightly buggy) version of the project is 32-bit Windows XP only.

Instrument 1: Time-tagging multiple-coincidence detector

Purpose and function:

• Collects data from 4 TTL sources and time-tags the positive edges of TTL pulses.
• Detects coincident positive edges (within one time bin).
• Outputs time-tags of events when one or more channels changed their state from TTL low to high.• Has no intrinsic deadtime.
• Operates using either an internal clock or an externally provided timer to define temporal bins.
• External TTL or a computer-controlled input restarts the clock (i.e. a "start" channel).

Downloads:

• Assembly instructions and manual
• Pre-compiled project, Source code zip file (FPGA firmware, mid-level driver and sample LabVIEW interface VIs)

Instrument 2: Multiple coincidence statistics

Purpose and function:

• Collects data from 4 TTL sources and detects single events and coincidental events.
• Accumulates statistical information on these events in hardware and uploads this information to a computer on demand.• No time tagging information is collected, therefore data exchange with a computer is minimized.

Downloads:

• Assembly instructions and manual
• Pre-compiled project, Source code zip file (FPGA firmware, mid-level driver and sample LabVIEW interface VIs)

Instrument 3: Multiple analog pulse processing

Purpose and function:

• Collects analog data from one source and detects events. Events are defined as input voltage crossing a pre-set threshold. Events begin with an upward crossing and end with first downward crossing.
• Provides information on each events peak amplitude, length and integral in real time. Accumulates statistical information on these events in hardware and uploads this information to a computer on demand.

Downloads:

• Assembly instructions and manual
• Pre-compiled project, Source code zip file (FPGA firmware, mid-level driver and sample LabVIEW interface VIs)