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Projects/Programs

Displaying 1 - 7 of 7

Emerging Hardware for Artificial Intelligence

Ongoing
Here is a brief description of our work with links to recent papers from our investigations, broadly classified as experimental and modeling. A brief overview of Josephson junction-based bio-inspired computing can be found in our review article. Experimental We have facilities to develop our devices

Integrated CMOS Testbeds for Nanoelectronics and Machine Learning

Ongoing
The increasingly complex device requirements for next-generation computing architectures such as neuromorphic computing or nanoelectronic machine learning accelerators present challenges for researchers across the spectrum of institutions, from small businesses and universities to government

Neuromorphic Device Measurements

Ongoing
One type of device that is emerging as an attractive artificial synapse is the resistive switch, or memristor. These devices, which usually consist of a thin layer of oxide between two electrodes, have conductivity that depends on their history of applied voltage, and thus have highly nonlinear

Physics and Hardware for Intelligence

Ongoing
Our work in this area can be separated into two categories: conceptual and experimental. Please read our publications linked below for more information. Experimental: Our latest generation of synaptic circuits are described in a 2024 paper published in APL Machine Learning. These circuits are our

Spintronics for Neuromorphic Computing

Ongoing
Magnetic tunnel junctions (see Fig. 1) consist of two thin films of ferromagnetic material separated by a few atomic layers of an insulating material. The insulator is so thin that electrons can tunnel quantum mechanically through it. The rate at which the electrons tunnel is affected by the

Temporal Computing

Ongoing
In standard integrated circuits, information that is coded as ones and zeros is implemented by voltages on wires being high or low. The circuits consume energy during transitions between these voltages. Binary numbers have a voltage per bit so there are a lot of transitions each time a number

Training and optimization of hardware neural networks

Ongoing
The goal of this project is to develop a general method that can train many different types of neural networks, and to demonstrate and evaluate their performance on new emerging hardware. We aim to develop and demonstrate training on diverse hardware platforms, and in the presence of realistic noise