The semiconductor industry continues to push for smaller features, more integration, and increased yield. New photoresist chemistries and advances in extreme ultraviolet lithography are enabling this trend. Focusing on new photoresist chemistries and extreme ultraviolet (EUV) lithography, the team at NIST plans to develop advanced metrology for advanced high-NA photoresist technology that will benefit future microelectronics manufacturing.
This project will offer industry a roadmap for rapid characterization of new EUV resist formulations, enhancing manufacturing yield and boosting competitiveness in the US semiconductor sector.
Grand Challenge 2. Advanced Metrology for Future Microelectronics Manufacturing
EUV (extreme ultraviolet) lithography, the technology that “saved Moore’s Law,” is widely regarded as the future of cutting-edge nanofabrication. It was developed in the United States and U.S. companies in many parts of the EUV ecosystem have established dominance in the field that must be defended and grown.
The advent of EUV has been accompanied by new challenges in high volume manufacturing. To increase throughput and lower cost, EUV fabs want to minimize dose, but they risk increasing photon shot noise and underexposing the resist, both of which increase line edge roughness (LER), which lowers yield. Given this, and many other technical challenges, it is evident that the semiconductor industry will greatly benefit from new, advanced capabilities in measuring lateral and vertical chemical heterogeneity across EUV processes.
This project will provide industry with new unique NIST measurement capabilities. This includes:
Providing industry with these new capabilities will enable technological advantages for the formulation and processing of advanced EUV and high-NA EUV photoresists, which will help industry develop pathways to meet LER targets. Reducing LER and stochastic defects in high-NA EUV resists is of paramount importance to the semiconductor industry.
Success of this project will ultimately increase semiconductor device manufacturing throughput and yield for devices of reduced feature sizes. These advantages will greatly advance the competitiveness and accelerate high-volume manufacturing in the U.S. semiconductor industry.