NOTICE: Due to a lapse in annual appropriations, most of this website is not being updated. Learn more.

Form submissions will still be accepted but will not receive responses at this time. Sections of this site for programs using non-appropriated funds (such as NVLAP) or those that are excepted from the shutdown (such as CHIPS and NVD) will continue to be updated.

U.S. flag

An official website of the United States government

Official websites use .gov
A .gov website belongs to an official government organization in the United States.

Secure .gov websites use HTTPS
A lock ( ) or https:// means you’ve safely connected to the .gov website. Share sensitive information only on official, secure websites.

Search Publications by: Kin (Charles) Cheung (Assoc)

Search Title, Abstract, Conference, Citation, Keyword or Author
Displaying 1 - 25 of 127

Impact of near interface defects on NO annealed SiC MOSFET mobility

July 2, 2025
Author(s)
Yu Xin Wen, Bing-Yue Tsui, Kin Cheung
A series of recent studies asserted that near-interface-traps (NITs) are introduced by the post-oxidation NO annealing process and these NITs are the cause for the low mobility of NO annealed SiC MOSFETs. We use fast Id-Vg measurement to directly probe

On the response time constant of interface defects

January 21, 2025
Author(s)
Kin Cheung, Yu Xin Wen, Bing-Yue Tsui
Interface defect response time is a key parameter in some common electrical measurements of MOS devices, most notably the hi-lo CV measurement as well as the conductance measurement. A long established believe is that interface defects at energies close to

A non-defect precursor gate oxide breakdown model

June 16, 2023
Author(s)
Kin (Charles) Cheung
Understanding defect creation is central to efforts to comprehend gate dielectric breakdown in metal-oxide-semiconductor-field-effect-transistors (MOSFETs). While gate dielectrics other than SiO2 are now popular, models develop for SiO2 breakdown are used

Measurement and Gate-Voltage Dependence of Channel and Series Resistances in Lateral Depletion-Mode b-Ga2O3 MOSFETs

June 9, 2023
Author(s)
Ory Maimon, Neil Moser, Kyle Liddy, Andrew Green, Kelson Chabak, Kin (Charles) Cheung, Sujitra Pookpanratana, Qiliang Li
Lateral depletion-mode, beta-phase gallium oxide (β-Ga2O3) metal-oxide-semiconductor field-effect transistors (MOSFETs) with source-drain spacings of 3 µm, 8 µm, and 13 µm are studied using a modified Transfer Length Method (TLM) to obtain sheet

V-Ramp test and gate oxide screening under the "lucky" defect model

May 15, 2023
Author(s)
Kin (Charles) Cheung
The persistent (after exhaustive wafer cleaning) extrinsic breakdown distribution of thick gate oxides requires early breakdown mechanisms beyond the popular local thinning model to explain. The success of the 'Lucky" defect model in fulfilling this role

A field-effect transistor-based room-temperature quantum current source

May 4, 2023
Author(s)
Kin (Charles) Cheung, Barry J O'Sullivan
The work provides a proof-of-concept demonstration of the room-temperature quantum current source based on nanoscale metal-oxide-semiconductor-Field-Effect-Transistor (MOSFET). Using low leakage MOSFET, the current pump achieved 1.00011 ± 0.00022 charges

On the "intrinsic" breakdown of thick gate oxide

October 12, 2022
Author(s)
Kin (Charles) Cheung
Thick gate oxide breakdown mechanism becomes an important topic again due to the rising demand of power electronics. The failure of the percolation model in explaining the observed Weibull shape factor of thick oxide breakdown distribution seriously

Determination of Domain Wall Velocity and Nucleation Time by Switching Dynamics Studies of Ferroelectric Hafnium Zirconium Oxide

July 22, 2022
Author(s)
Xiao Lyu, Pragya Shrestha, Mengwei Si, Panni Wang, Junkang Li, Kin (Charles) Cheung, Yu Shimeng, Peide Ye
In this work, we present the first experimental determination of nucleation time and domain wall (DW) velocity by studying switching dynamics of ferroelectric (FE) hafnium zirconium oxide (HZO). Experimental data and simulation results were used to

Dynamics studies of polarization switching in ferroelectric hafnium zirconium oxide

May 12, 2021
Author(s)
X. Lyu, M. Si, Pragya Shrestha, Kin (Charles) Cheung, P. D. Ye
In this paper, we review the ultrafast direct measurement on the transient ferroelectric polarization switching in hafnium zirconium oxide with crossbar metal-insulator-metal (MIM) structures including materials development, device fabrication, structure

Record Fast Polarization Switching Observed in Ferroelectric Hafnium Oxide Crossbar Arrays

July 2, 2020
Author(s)
Pragya R. Shrestha, xiao Lyu, Mengwei Si, Jason P. Campbell, Kin P. Cheung, Peide Ye
The polarization switching speed of ferroelectric (FE) hafnium zirconium oxide (HZO) is studied with the device size down to sub-μm in lateral dimension. Ultrafast measurement of transient switching current on metal-ferroelectric-metal (MFM) device with a

Anomalous accelerated negative-bias- instability (NBI) at low drain bias

June 30, 2020
Author(s)
Kin P. Cheung
We observed at very low drain bias an anomalous acceleration of Negative-bias-instability at room temperature, as if the channel temperature has been raised significantly. The channel width and channel length dependent of this acceleration suggest that in

Memory update characteristics of carbon nanotube memristors (NRAM) under circuitry-relevant operation conditions

June 30, 2020
Author(s)
Dmitry Veksler, gennadi bersuker, A W. Bushmaker, Maribeth Mason, Pragya Shrestha, Kin P. Cheung, Jason Campbell, T Rueckes, L Clevlend, H Luan, D C. Gilmer
Carbon nanotubes (CNT) resistance-change memory devices were assessed for neuromorphic applications under high frequency use conditions by employing the ultra-short (100 ps -10 ns) voltage pulse technique. Under properly selected operation conditions, CNTs

Nanoscale MOSFET as a potential Room-Temperature Quantum Current Source

March 31, 2020
Author(s)
Kin P. Cheung, Jason P. Campbell
Nanoscale metal-oxide-semiconductor field-effect-transistors (MOSFETs) with only one defect at the interface can potentially become a single electron turnstile linking frequency and electronic charge to realize the elusive quantized current source. Charge

Nonresonant transmission line probe for sensitive interferometric electron spin resonance detection

August 5, 2019
Author(s)
Pragya R. Shrestha, Nandita S. Abhyankar, Mark A. Anders, Kin P. Cheung, Robert M. Gougelet, Jason T. Ryan, Veronika A. Szalai, Jason P. Campbell
Electron spin resonance (ESR) spectroscopy measures paramagnetic free radicals, or electron spins, in a variety of biological, chemical, and physical systems. Detection of diverse paramagnetic species is important in applications ranging from quantum

Switching variability factors in compliance-free metal oxide RRAM

March 31, 2019
Author(s)
Dmitry Veksler, Gennadi Bersuker, A W. Bushmaker, Pragya Shrestha, Kin P. Cheung, Jason Campbell
Switching variability in polycrystalline compliance-free HfO2-based 1R RRAM is evaluated employing ultra-fast low voltage pulse approach. Changes in filament conductivity are linked to the variations of energy released in a switching process. This study

An Ultra-fast Multi-level MoTe2-based RRAM

January 17, 2019
Author(s)
Albert Davydov, Leonid A. Bendersky, Sergiy Krylyuk, Huairuo Zhang, Feng Zhang, Joerg Appenzeller, Pragya R. Shrestha, Kin P. Cheung, Jason P. Campbell
We report multi-level MoTe2-based resistive random-access memory (RRAM) devices with switching speeds of less than 5 ns due to an electric-field induced 2H to 2Hd phase transition. Different from conventional RRAM devices based on ionic migration, the

Slow- and rapid-scan frequency-swept electrically detected magnetic resonance of MOSFETs with a non-resonant microwave probe within a semiconductor wafer-probing station

January 14, 2019
Author(s)
Duane J. McCrory, Mark Anders, Jason Ryan, Pragya Shrestha, Kin P. Cheung, Patrick M. Lenahan, Jason Campbell
We report on a novel electron paramagnetic resonance (EPR) technique that merges electrically detected magnetic resonance (EDMR) with a conventional semiconductor wafer probing station. This union, which we refer to as wafer-level EDMR (WL-EDMR), allows

Parasitic engineering for RRAM control

October 15, 2018
Author(s)
Pragya R. Shrestha, David M. Nminibapiel, Dmitry Veksler, Jason P. Campbell, Jason T. Ryan, helmut Baumgart, Kin P. Cheung
The inevitable current overshoot which follows forming or switching of filamentary resistive random access memory (RRAM) devices is often perceived as a source of variability that should be minimized. This sentiment has resulted in efforts to curtail the

Non-tunneling origin of the 1/f noise in SiC MOSFET

July 1, 2018
Author(s)
Kin (Charles) Cheung, Jason Campbell
Abstract: It has long been established that MOSFET random telegraph noise and the cumulative 1/f noise is the result of inversion charge tunneling in and out of bulk traps in the gate oxide near the interface. The tunneling nature is a key concept upon

First Direct Experimental Studies of Hf0.5Zr0.5O2 Ferroelectric Polarization Switching Down to 100-picosecond in Sub-60mV/dec Germanium Ferroelectric Nanowire FETs

June 18, 2018
Author(s)
Wonil Chung, Mengwei Si, Pragya Shrestha, Jason Campbell, Kin P. Cheung, Peide Ye
In this work, ultrafast pulses with pulse widths ranging from 100 ps to seconds were applied on the gate of Ge ferroelectric (FE) nanowire (NW) pFETs with FE Hf0.5Zr0.5O2 (HZO) gate dielectric exhibiting steep subthreshold slope (SS) below 60 mV/dec bi

SiC power MOSFET gate oxide breakdown reliability Current status

May 3, 2018
Author(s)
Kin P. Cheung
SiC power MOSFET is poised to take off commercially. Gate oxide breakdown reliability is an important obstacle standing is the way. Early prediction of poor intrinsic reliability comparing to silicon MOSFET, while theoretically sound, has now proven way

Glassy-Electret Random Access Memory - A naturally Nanoscale Memory Concept

April 19, 2018
Author(s)
Jason Campbell, Pragya Shrestha, Vasileia Georgiou, D. E. Ioannou, Kin (Charles) Cheung
Self-heating is a serious issue in state-of-the-art MOSFET technology. Much efforts are currently being made to combat this problem to enable further scaling. In this work, self-heating in nanoscale MOSFET is leveraged and enhanced to enable a new memory
Was this page helpful?