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Search Publications by: Kin (Charles) Cheung (Fed)

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Displaying 101 - 125 of 251

Interface-State Capture Cross Section — Why Does It Vary So Much?

April 20, 2015
Author(s)
Jason T. Ryan, Asahiko Matsuda, Jason P. Campbell, Kin P. Cheung
A capture cross section value is often assigned to Si-SiO2 interface defects. Using a kinetic variation of the charge pumping technique and transition state theory, we show that the value of capture cross section is extremely sensitive to the measurement

Frequency Modulated Charge Pumping with Extremely High Gate Leakage

February 13, 2015
Author(s)
Jason T. Ryan, Jibin Zou, Jason P. Campbell, Richard Southwick, Kin P. Cheung, Anthony Oates, Rue Huang
Charge pumping (CP) has proven itself as one of the most utilitarian methods to quantify defects in metal-oxide-semiconductor devices. In the presence of low to moderate gate leakage, CP quantification is most often implemented via a series of measurements

Device-Level Experimental Observations of NBTI-Induced Random Timing Jitter

December 13, 2014
Author(s)
Guangfan Jiao, Jiwu Lu, Jason Campbell, Jason Ryan, Kin P. Cheung, Chadwin D. Young, Gennadi Bersuker
This work utilizes device-level eye-diagram measurements to examine NBTI-induced changes in timing jitter at circuit speeds. The measured jitter is examined for a variety of ring-oscillator and pseudo-random gate patterns. The ring-oscillator patterns were

PBTI-Induced Random Timing Jitter in Circuit-Speed Random Logic

November 13, 2014
Author(s)
Jiwu Lu, Canute I. Vaz, Guangfan Jiao, Jason P. Campbell, Jason T. Ryan, Kin P. Cheung, Gennadi Bersuker, Chadwin D. Young
Accurate reliability predictions of real world digital logic circuits rely heavily on the relevancy of device level testing. In the case of bias temperature instability (BTI), where recovery plays a significant role, a leap of faith is taken to translate

Impact of BTI on Random Logic Circuit Critical Timing

October 31, 2014
Author(s)
Kin P. Cheung, Jiwu Lu, Guangfan Jiao, Jason P. Campbell, Jason T. Ryan
Bias temperature instability (BTI) is known to be a serious reliability issue for state-of-the-art Silicon MOSFET technology [1-6]. It is well-known that in addition to a “permanent” degradation, there is a large recoverable degradation component [7] that

Device-Level PBTI-induced Timing Jitter Increase in Circuit-Speed Random Logic Operation

July 31, 2014
Author(s)
Jiwu Lu, Canute I. Vaz, Jason P. Campbell, Jason T. Ryan, Kin P. Cheung, Guangfan Jiao, Gennadi Bersuker, Chadwin D. Young
We utilize eye-diagram measurements of timing jitter to investigate the impact of PBTI in devices subject to DC as well as ring oscillator (RO) and pseudo-random binary sequence (PRBS) stress waveforms. We observe that RO measurements miss the relevant

Accurate Fast Capacitance Measurements for Reliable Device Characterization

July 1, 2014
Author(s)
Pragya R. Shrestha, Kin P. Cheung, Jason P. Campbell, Jason T. Ryan, Helmut Baumgart
As device dimensions continue to scale, transient phenomena are becoming increasingly more important to understand for both performance and reliability considerations. Recently, fast capacitances versus voltage (CV) measurements have been gaining attention

Energy Control Paradigm for Compliance-Free Reliable Operation of RRAM

June 5, 2014
Author(s)
Pragya R. Shrestha, David M. Nminibapiel, Jihong Kim, Jason P. Campbell, Kin P. Cheung, Shweta Deora, G. Bersuker, Helmut Baumgart
We demonstrate reliable RRAM operation by controlling the forming energy via short voltage pulses (picosecond range) which eliminates the need for a current compliance element. We further show that the dissipated energy during forming and SET/RESET

Circuit Speed Timing Jitter Increase in Random Logic Operation after NBTI Stress

June 1, 2014
Author(s)
Guangfan Jiao, Jiwu Lu, Jason Campbell, Jason Ryan, Kin P. Cheung, Chadwin D. Young, Gennadi Bersuker
Recently, much effort has been spent trying to relate NBTI observations to real circuit impacts. While many of these efforts rely on circuit simulation to bridge this gap, an experimental approach is, of course, preferred. In this study we provide this

Accurate RRAM Transient Currents during Forming

April 30, 2014
Author(s)
Pragya R. Shrestha, David M. Nminibapiel, Jason P. Campbell, Jihong Kim, Canute I. Vaz, Kin P. Cheung, Helmut Baumgart
Current overshoot during forming has been shown to be a serious issue. Recently the current overshoot duration has been shown to be an important factor impacting device performance. Short duration overshoot in the range of ns yield better performance. But

Constant Shape Factor Frequency Modulated Charge Pumping (FMCP)

March 3, 2014
Author(s)
Jason T. Ryan, Jason P. Campbell, Jibin Zou, Kin P. Cheung, Richard Southwick, Anthony Oates, Rue Huang
Abstract— We examine the seemingly frequency-dependent gate leakage current component of frequency-modulated charge pumping and show it to be a measurement artifact. If untreated, this results in erroneous defect density extractions. We present a constant

Dependence of the Filament Resistance on the Duration of Current Overshoot

March 3, 2014
Author(s)
Pragya R. Shrestha, David M. Nminibapiel, Jason P. Campbell, Kin P. Cheung, Helmut Baumgart, Shweta Deora, G. Bersuker
The characteristics of a conductive filament in HfO2 RRAM is shown to be dependent on the duration of the current compliance overshoot, which may occur during the filament formation process. In addition to the overshoot amplitude, the filament resistance

Fast-Capacitance for Advanced Device Characterization

March 3, 2014
Author(s)
Pragya R. Shrestha, Kin P. Cheung, Jason T. Ryan, Jason P. Campbell, Helmut Baumgart
Fast-CV measurements are frequently being used to study transient phenomena associated with advanced devices. In this study, we show that many artifacts plague this measurement and then provide a proper method to legitimize fast-CV measurements as