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Search Publications by: Daniel Josell (Fed)

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Displaying 101 - 125 of 273

Spatial-Temporal Modeling of Extreme Bottom-Up Filling of Through-Silicon-Vias

December 6, 2013
Author(s)
Daniel Wheeler, Thomas P. Moffat, Daniel Josell
Extreme bottom-up superfilling of annular through-silicon-vias (TSV) during copper electrodeposition has been reported wherein metal deposits on the bottom surface of the TSV with negligible deposition on its sidewalls or the field around it. The growth

Photocurrent Mapping of 3D CdSe/CdTe Windowless Solar Cells

August 22, 2013
Author(s)
Carlos M. Hangarter, Ratan K. Debnath, Jong Y. Ha, M. E. Sahiner, C. J. Reehil, W. A. Manners, Daniel Josell
This paper details the use of scanning photocurrent microscopy to examine localized current collection efficiency of thin film photovoltaic devices with in-plane patterning at a submicrometer length scale. The devices are based upon two interdigitated comb

Superfilling Damascene Trenches with Gold in Sulfite Electrolyte

April 24, 2013
Author(s)
Daniel Josell, Thomas P. Moffat
Superconformal Au deposition is demonstrated in a Na_(3)Au(SO_(3))_(2 -) Na_(2)SO-(3) based electrolyte using underpotential deposited (upd) Pb to catalyze the reduction of Au(SO_(3))_(2)^(3-). Micromolar additions of Pb^(2+) to the electrolyte give rise

Backcontact CdSe/CdTE Windowless Solar Cells

February 1, 2013
Author(s)
Donguk Kim, Carlos M. Hangarter, Ratan K. Debnath, Jong Y. Ha, Carlos R. Beauchamp, Matthew D. Widstrom, Jonathan E. Guyer, Nhan Van Nguyen, B. Y. Yoo, Daniel Josell
This paper details the fabrication and properties of CdSe/CdTe thin film photovoltaic devices with a dual back contact geometry. Device fabrication involves cadmium selenide electrodeposition on one of two interdigitated electrodes on a pre-patterned

Modeling Extreme Bottom-Up Filling of Through Silicon Vias

August 29, 2012
Author(s)
Daniel Josell, Daniel Wheeler, Thomas P. Moffat
Extreme bottom-up superfilling of through silicon vias (TSV) was recently described wherein deposition occurs on the bottom surface of the vias with negligible deposition on their sidewalls or the field around them. The process uses a deposition

Three-Dimensionally Structured CdS/CdTe Photovoltaics on Dual Interdigitated Back-Contacts

April 8, 2011
Author(s)
Carlos M. Hangarter, Behrang Hamadani, Ryan F. Need, Carlos R. Beauchamp, Hua Xu, John E. Bonevich, Nikolai Zhitenev, Daniel Josell
The fabrication and properties of three-dimensionally structured CdS/CdTe solar cells with back-contacts are described. Fabrication entails electrodeposition of CdS at submicrometer length scales on one of two metal electrodes interdigitated in a comb

On the Fracture Behavior of Nano-Layered Coatings Under Tension.

October 29, 2010
Author(s)
Daniel Josell, Herzl Chai
In this work the fracture behavior of a model brittle/ductile (Si/Ag) multilayer evaporated on a thick substrate is studied with the aid of a four-point bending apparatus. The system variables include individual layer thickness (2.5 to 30 nm), total film

Superconformal Electrodeposition for 3-D Interconnects

September 7, 2010
Author(s)
Thomas P. Moffat, Daniel Josell
Electrodeposition is a key fabrication process used in the state-of-the-art multilevel Cu metallization of microelectronic interconnects from transistor to circuit board length scale. Recent electrochemical surface science and feature filling studies have

Three-Dimensionally Structured Thin Film Heterojunction Photovoltaics on Interdigitated Back-Contacts

February 1, 2010
Author(s)
Daniel Josell, Carlos R. Beauchamp, Behrang H. Hamadani, Suyong S. Jung, Jonathan E. Guyer, Abhishek Motayed, Carlos M. Hangarter, Nadine E. Gergel-Hackett, Hua Xu, Nikolai B. Zhitenev
Fabrication and properties of three-dimensionally structured back-contact heterojunction solar cells are described. A variety of devices are explored, all of which were fabricated by electrochemical deposition of a semiconducting material on one of two

3-D Metallization by Damascene Electrodeposition

January 1, 2010
Author(s)
Thomas P. Moffat, Chang H. Lee, Daniel Josell
Electrodeposition is a key fabrication process used in the state-of-the-art multilevel Cu metallization of microelectronic interconnects from transistor to circuit board length scale. Recent electrochemical surface science and feature filling studies have